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	<div id="winchm_template_title">rm (Register Mask)</div>
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	<div id="winchm_template_content"><div id="mainSection"><p>The <b>rm</b> command modifies or displays the register display mask. This mask controls how registers are displayed by the <a href="#Bookmark2025"><b>r (Registers)</b></a> command.</p>
<pre class="syntax"><b>rm</b> 
<b>rm</b> <b>?</b> 
<b>rm</b> Mask 
</pre>
<h2><a id="ddk_cmd_register_mask_dbg"></a><a id="DDK_CMD_REGISTER_MASK_DBG"></a>Parameters</h2>
<p></p>
<dl>
<dt><a id="______________"></a>       <b>?</b>      </dt>
<dd>
<p>Displays a list of possible <i>Mask</i> bits.</p>
</dd>
<dt><a id="_______Mask______"></a><a id="_______mask______"></a><a id="_______MASK______"></a>       <i>Mask</i>      </dt>
<dd>
<p>Specifies the mask to use when the debugger displays the registers. <i>Mask</i> is a sum of bits that indicate something about the register display. The meaning of the bits depends on the processor and the mode. For more information; see the tables in the following Remarks section.</p>
</dd>
</dl>
<h3><a id="Environment"></a><a id="environment"></a><a id="ENVIRONMENT"></a>Environment</h3>
<table>
<tr>
<td>
<p><b>Modes</b></p>
</td>
<td>
<p>User mode, kernel mode</p>
</td>
</tr>
<tr>
<td>
<p><b>Targets</b></p>
</td>
<td>
<p>Live, crash dump</p>
</td>
</tr>
<tr>
<td>
<p><b>Platforms</b></p>
</td>
<td>
<p>All </p>
</td>
</tr>
</table>
<p> </p>
<h2>Remarks</h2>
<p>The "m" in the command name must be a lowercase letter.</p>
<p>If you use <b>rm</b> with no parameters, the current value is displayed, along with an explanation about its bits.</p>
<p>To display the basic integer registers, you must set bit 0 (0x1) or bit 1 (0x2). By default, 0x1 is set for 32-bit targets and 0x2 is set for 64-bit targets. You cannot set these two bits at the same time--if you try to set both bits, 0x2 overrides 0x1.</p>
<p>You can override the default mask by using the <a href="#Bookmark2025"><b>r (Registers)</b></a> command together with the <b>M</b> option.</p>
<p>The following <i>Mask</i> bits are supported for an x86-based processor or an x64-based processor.</p>
<table>
<tr>
<th>Bit</th>
<th>Value</th>
<th>Description</th>
</tr>
<tr>
<td>
<p>
<dl>
<dt>0</dt>
<dt>1</dt>
</dl>
</p>
</td>
<td>
<p>
<dl>
<dt>0x1</dt>
<dt>0x2</dt>
</dl>
</p>
</td>
<td>
<p>Displays the basic integer registers. (Setting one or both of these bits has the same effect.)</p>
</td>
</tr>
<tr>
<td>
<p>2</p>
</td>
<td>
<p>0x4</p>
</td>
<td>
<p>Displays the floating-point registers.</p>
</td>
</tr>
<tr>
<td>
<p>3</p>
</td>
<td>
<p>0x8</p>
</td>
<td>
<p>Displays the segment registers.</p>
</td>
</tr>
<tr>
<td>
<p>4</p>
</td>
<td>
<p>0x10</p>
</td>
<td>
<p>Displays the MMX registers.</p>
</td>
</tr>
<tr>
<td>
<p>5</p>
</td>
<td>
<p>0x20</p>
</td>
<td>
<p>Displays the debug registers. In kernel mode, setting this bit also displays the CR4 register.</p>
</td>
</tr>
<tr>
<td>
<p>6</p>
</td>
<td>
<p>0x40</p>
</td>
<td>
<p>Displays the SSE XMM registers.</p>
</td>
</tr>
<tr>
<td>
<p>7</p>
</td>
<td>
<p>0x80</p>
</td>
<td>
<p>(Kernel mode only)  Displays the control registers, for example CR0, CR2, CR3 and CR8.</p>
</td>
</tr>
<tr>
<td>
<p>8</p>
</td>
<td>
<p>0x100</p>
</td>
<td>
<p>(Kernel mode only)  Displays the descriptor and task state registers.</p>
</td>
</tr>
<tr>
<td>
<p>9</p>
</td>
<td>
<p>0x200</p>
</td>
<td>
<p>Displays the AVX YMM registers in floating point.
</p>
</td>
</tr>
<tr>
<td>
<p>10</p>
</td>
<td>
<p>0x400</p>
</td>
<td>
<p>Displays the AVX YMM registers in decimal integers.</p>
</td>
</tr>
<tr>
<td>
<p>11</p>
</td>
<td>
<p>0x800</p>
</td>
<td>
<p>Displays the AVX XMM registers in decimal integers.</p>
</td>
</tr>
</table>
<p> </p>
<p></p>
<p>The following <i>Mask</i> bits are supported for an Itanium-based processor.</p>
<table>
<tr>
<th>Bit</th>
<th>Value</th>
<th>Description</th>
</tr>
<tr>
<td>
<p>
<dl>
<dt>0</dt>
<dt>1</dt>
</dl>
</p>
</td>
<td>
<p>
<dl>
<dt>0x1</dt>
<dt>0x2</dt>
</dl>
</p>
</td>
<td>
<p>Displays the basic integer registers. (Setting one or both of these bits has the same effect.)</p>
</td>
</tr>
<tr>
<td>
<p>2</p>
</td>
<td>
<p>0x4</p>
</td>
<td>
<p>Displays the floating-point registers.</p>
</td>
</tr>
<tr>
<td>
<p>3</p>
</td>
<td>
<p>0x8</p>
</td>
<td>
<p>Displays the high, floating-point registers (<b>f32</b> to <b>f127</b>).</p>
</td>
</tr>
<tr>
<td>
<p>4</p>
</td>
<td>
<p>0x10</p>
</td>
<td>
<p>Displays the user debug registers.</p>
</td>
</tr>
<tr>
<td>
<p>5</p>
</td>
<td>
<p>0x20</p>
</td>
<td>
<p>(Kernel mode only)  Displays the KSPECIAL_REGISTERS.</p>
</td>
</tr>
</table>
<p> </p></div></div>	
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